
within ModelicaByExample.Connectors;
package BlockConnectors "Connectors for block diagrams"
  connector RealInput = input Real;
  connector RealOutput = output Real;
  connector IntegerInput = input Integer;
  connector IntegerOutput = output Integer;
  connector BooleanInput = input Boolean;
  connector BooleanOutput = output Boolean;
end BlockConnectors;

We can at least see how SysPhS handles these by assigning the corresponding signal flow InterfaceBlocks to Ports of a block BlockConnectors, which exports from MagicDraw/Cameo to Modelica as:


model BlockConnectors
  Modelica.Blocks.Interfaces.RealInput iR;
  Modelica.Blocks.Interfaces.RealOutput oR;
  Modelica.Blocks.Interfaces.IntegerInput iI;
  Modelica.Blocks.Interfaces.IntegerOutput oI;
  Modelica.Blocks.Interfaces.BooleanInput iB;
  Modelica.Blocks.Interfaces.BooleanOutput oB;
end BlockConnectors;

Where:


connector RealInput = input Real "'input Real' as connector";


connector RealOutput = output Real "'output Real' as connector";


connector IntegerInput = input Integer "'input Integer' as connector";


connector IntegerOutput = output Integer "'output Integer' as connector";


connector BooleanInput = input Boolean "'input Boolean' as connector";


connector BooleanOutput = output Boolean "'output Boolean' as connector";

The block BlockConnectorsContext shows some connections in context, and exports via SysPhS to Modelica as:


model BlockConnectorsContext
  BlockConnectorsContext _BlockConnectorsContext;
  model BlockConnectorsContext
    BlockConnectors a;
    BlockConnectors b;
  equation
    connect(a.oR,b.iR);
    connect(a.oI,b.iI);
    connect(a.oB,b.iB);
  end BlockConnectorsContext;
  model BlockConnectors
    Modelica.Blocks.Interfaces.RealInput iR;
    Modelica.Blocks.Interfaces.RealOutput oR;
    Modelica.Blocks.Interfaces.IntegerInput iI;
    Modelica.Blocks.Interfaces.IntegerOutput oI;
    Modelica.Blocks.Interfaces.BooleanInput iB;
    Modelica.Blocks.Interfaces.BooleanOutput oB;
  end BlockConnectors;
end BlockConnectorsContext;

The Internal Block Diagram (IBD) shows the SysML :flow properties compartments exposed on some Ports.

Up next

Graphical Connectors

Notes

[CONVENTION, MODELLING, NAMING, TIP]{STRONG} Webel: If you must name your Ports or Pins, name them simply 'i', 'o', or 'io' (or 'oi') to indicate direction UNLESS you have to indicate a special role like 'iRole', 'oAuxiliary'. DO NOT use Port or Pin names like 'input', 'output', etc.

[MODELLING, NAMING] Concerning definitions: "a connector end" vs "a connector between 2 ends" vs "connection" vs "connect" in various technologies

[COMPLICATION, GOTCHA, NAMING, WARNING]{INFORMATIVE} SysML vs Modelica: GOTCHA: Terminology: A 'connector' in Modelica is equivalent to the Type of a Port in SysML. A Connector in SysML-1.x is equivalent to a 'connect(source,target)' in Modelica.

Snippets (quotes/extracts)

Related slides (includes other tutorials)

Figure 22: Ports for signal flow in SysML

Figure 30: Elements for signal flow

Related slides (backlinks, includes other tutorials)