BDD: Figure 49: Total system (source to sink) blocks, ports, & component properties

An expanded version of the spec's Block Definition Diagram (BDD) Figure 49: Total system (source to sink) blocks, ports, & component properties:
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Some minor diagramming differences compared with the spec figure version:

- SysML Ports are used (instead of Association ends with composite aggregation and a user-defined «port» keyword).

- The context block TestBed is shown.

- The SignalSource is shown at the top and the SignalSink at the bottom (anticipating the layout in the IBD).

This is a nice expert tool tip:

It's done here so one can see the InstanceSpecification source0 of type SignalSource, which is assigned as the defaultValue of inputSignal within the context TestBed, and carries in its Slot for amp the initial value 3.0 for use within the context TestBed (as we'll see next in the IBD).

(On a minor point, the naming of the block property scopeSignalOutput of type SignalSink does not follow Webel Best Practice, because there is nothing in the type name SignalSink that indicates it is a scope. It would be better to have a specialisation of block SignalSink called SignalScope, and then use a consistent name outputSink or such.)

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