Tags and keywords
All pins on the 1st header of the Mega2560 only involve the ATmega2560 mcu chip (and ground
The mapping of the header pins to specific mcu chip pins is captured using Slots of instances of the same types as the Ports typed by the specific «pin» types we saw in the previous slide; these pin mapping values can optionally also be displayed as Context-Specific Values in Internal Block Diagrams, and can guide "wiring" connections made with Connectors in the context of the
Note how the keywords of the custom stereotypes applied to the pin types "shine through" on the instance symbols, which in this case is quite convenient because there is no way of showing this information on the lines in the ports compartment:
The pin ports in the header block have corresponding pin shared reference properties in the row block (and in the same order), but we won't be using the row blocks further in this trail.
Note also how the names of the pin ports "trust the type name" as far as possible and are just enough to distinguish their role.
A separate system-wide instance
gnd:GND with a
net value (rather than a mapping to a specific pin) is assigned as a context-specific value for a pin of type
The SDA/SCL I2C pins are a special case. On the actual board digital pin 20 is marked as SDA and digital pin 21 is marked as SCL (at one end of the header). But there are is fact another pair of unmarked SDA/SCL beyond the AREF pin, and these map to the same mcu pins PD1 (for SDA) and PD0 (for SCL). In the SysML model these sets are indicated as pairs (d20_SDA_INT1_a, d21_SCL_INT0) and (d20_SDA_INT1_b, d21_SCL_INT0), and their pin mappings indicate both their SDA/SCL nets and their ultimate mcu pins PD1 and PD0.
The AREF pin is also part of a net, both the AREF header pin and the corresponding mcu pin connect to a net that passes to GND via a capacitor.
The header is modelled has having a single row. If you look closely a the board you'll see that the single "row" is in fact composed of 3 sub-rows end-to-end but with small gaps. We'll ignore that in this trail.