Icon class icon_class fas fa-quote-left icon_class_computed fas fa-quote-left Related content Figure 29: State machine in SysML SysPhS-1.1: p.47: 10.12.2 SysML modeling: TYPO: Incorrect spelling of RealInSignalElement (should be RealSignalInElement) and RealOutSignalElement (should be RealSignalOutElement) Source SysPhS-1.1 Copyright information About Object Management Group copyright in text extracts quoted from OMG specifications for educational purposes Snippet kind INFO UML keywords Port SysML keywords "standard" Port SysPhS Keywords RealSignalInElement RealSignalOutElement Keywords SysPhS SysML Systems Modeling Language Previous snippet Full quote Computer has ports u and y of type RealInSignalElement and RealOutSignalElement from the signal flow library (see Subclause 11.2.1), respectively. Next snippet The state machine has one initial pseudostate, and two states StandBy and On. SysPhS-1.1: p.47: 10.12.2 SysML modeling: TYPO: Incorrect spelling of RealInSignalElement (should be RealSignalInElement) and RealOutSignalElement (should be RealSignalOutElement) Related snippets Related snippets (backlinks) The state machine has one initial pseudostate, and two states StandBy and On. The transition from the initial pseudostate to StandBy has a relative TimeEvent with an expression indicating that the transition fires 5 seconds after the initial pseudostate is entered. The transition from StandBy to On has a ChangeEvent with an expression indicating that the transition is triggered when u.sigsp [ERROR] is equal to 1 (this is a signal as in signal flow simulation, not as in SysML). The transition from On to StandBy has a ChangeEvent with an expression indicating that the transition is triggered when u.sigsp [ERROR] is equal to 0. When the computer is in StandBy, y.sigsp [ERROR] is set to 8, and when the computer is On, y.sigsp [ERROR] is set to 3. Visit also Visit also (backlinks) Flags
